DCU

Lattice Semiconductor ECP5/ECP5-5G Dual-Channel Unit (DCU) Interface.

class bakeneko.interface.phy.serdes.vendor.lattice.ecp5.dcu.DCU(*, dcu: DCUNumber, channel: Channel, link_speed: Literal[LinkSpeed.LS2_5, LinkSpeed.LS5_0], refclk: Signal, tx0_p: Signal | None = None, tx0_n: Signal | None = None, rx0_p: Signal | None = None, rx0_n: Signal | None = None, tx1_p: Signal | None = None, tx1_n: Signal | None = None, rx1_p: Signal | None = None, rx1_n: Signal | None = None, bitclk_from_next_dual: bool = False) → None

Lattice Semiconductor ECP5/ECP5-5G devices have a concept called a Dual-Channel Unit (DCU), it represents an encapsulation of 2 SerDes channels.

Each ECP5/ECP5-5G device has 2 DCUs on the larger 45k an 85k variants, and a single DCU on the smaller 25k variants with no DCUs the non-UM devices.

The overall structure of a DCU looks like this:

╭───────────╮
│    DCU    │
├─────┬─────┤
│ CH0 │ CH1 │
╰─────┴─────╯

Within each DCU, there is also an EXTREF block, which deals with internal reference clock generation from the DCU, as well as an auxiliary control channel.

A more detailed block diagram of a DCU would be as follows:

╭───────────────────────────────╮
│              DCU              │
│ ╭─────────╮ ╭─────────╮ ╭───╮ │
│ │         │ │         │ │ A │ │
│ │   CH0   │ │   CH1   │ │ U │ │
│ │         │ │         │ │ X │ │
│ ├─────────┤ ├─────────┤ ╰───╯ │
│ │         │ │         │ ╭───╮ │
│ │   PCS   │ │   PCS   │ │ E │ │
│ │         │ │         │ │ X │ │
│ ├─────────┤ ├─────────┤ │ T │ │
│ │ SERDES0 │ │ SERDES1 │ │ R │ │
│ ├────┬────┤ ├────┬────┤ │ E │ │
│ │ RX │ TX │ │ RX │ TX │ │ F │ │
│ ╰────┴────╯ ╰────┴────╯ ╰───╯ │
╰───────────────────────────────╯

For more details on the ECP5 DCUs see the Lattice Technical Note FPGA-TN-02206.

Note

Many of the DCU and channel properties are set at elaboration time for the synthesis and place-and-route tools, however, many, if not most of them are able to be modified via the SerDes Client Interface (SCI) for the DCU.

Parameters:

  • dcu (DCUNumber) – The specific DCU on the device to use.

  • channel (Channel) – The specific channel or channels to use for the given DCU.

  • link_speed (LinkSpeed) – The link speed for the DCUs channels.

  • refclk (Signal) – The input reference clock for this DCU

  • tx0_p (Signal | None) – The positive side of the channel 0 transmitter pair (default: None)

  • tx0_n (Signal | None) – The negative side of the channel 0 transmitter pair (default: None)

  • rx0_p (Signal | None) – The positive side of the channel 0 receiver pair (default: None)

  • rx0_n (Signal | None) – The negative side of the channel 0 receiver pair (default: None)

  • tx1_p (Signal | None) – The positive side of the channel 0 transmitter pair (default: None)

  • tx1_n (Signal | None) – The negative side of the channel 0 transmitter pair (default: None)

  • rx1_p (Signal | None) – The positive side of the channel 0 receiver pair (default: None)

  • rx1_n (Signal | None) – The negative side of the channel 0 receiver pair (default: None)

  • bitclk_from_next_dual (bool) –

    Route the TX bitclock from the AUX channel of the DCU that is next to us.

    e.g. If we are DCU0, then the TX bitclock will come from the AUX channel of DCU1. (default: False)

Attributes:

  • dcu_num (DCUNumber) – The DCU on the device this module is configured for

  • chan (Channel) – The DCU channel(s) this module is configured for

  • sci (DCUInterface) – The SerDes Client Interface for this DCU.

elaborate(platform: Platform | None) → Module
Return type:

Module

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